Digital electronics Experiment 9 aim To design the 4-bit asynchronous counter
Note remember page numbers
APPARATUS REQUIRED: Bread Board, IC 7473 & Connecting Wire.
THEORY: A binary ripple counter can be constructed by use of clocked J K flip- flops. The
system clock, a square wave, drives flip flop A. The output of A drives B , and the output of B
drives flip –flop C. All the J and K input are tied to +Vcc. This means that each flip flop will
change state with a negative transition at its clock input. Lets assume that the flip - flops are
initially reset to produce „0‟outputs. If we consider A to be least -significant bit (LSB) and C the
most significant bit (MSB) , we can say the contents of the counter is CBA =000.
Since A acts as the clock for B, each time the waveform at A goes low, flip flop
B will toggle. Thus at point b on the time line, B goes high ;it then goes low at the point d and
toggles back high again at point f. Notice that the wave from at the output of flip flops one –half
the frequency of A and one –forth the clock frequency . Since B acts a the clock for C, Each
time the waveform at B goes low, flip flop C will toggle. Thus C goes high at point d on the time
line and goes back low again at point h. The frequency of the wave form at C is one half that at
B, But it is only one either the clock frequency.
RESULT: The observation table of Asynchronous Counter is verified.
PRECAUTION:
1) All Connections should be according to Pin diagram.
2) All Connections should be right and tight.
3) Reading should be taken carefully.
4) Switch off Power supply after completing the Experiment
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