Integrated Injection Logic Operation

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Direct-Coupled Transistor Logic (DCTL)

Transistorized digital circuits basically fulfill the three logical functions of AND (or NAND) gating, OR (or NOR) gating, and signal inversion (NOT gate). An additional function usually performed, though not logical in nature but nevertheless a practical necessity, is signal amplification. Other logical blocks, such as NOR, NAND, and flip-flops, are easily obtained using these three fundamental functional blocks. Several different circuit configurations can be used for these functional blocks. Normally these circuits are classified according to the elements used for interstage coupling or coupling between gates and inverters and amplifiers. The most commonly used coupling elements are diodes, resistors, resistor-capacitor combinations, and transistors themselves. It is also possible to design and use circuits without any of these coupling elements. Such circuits are referred to as direct-coupled transistor-logic circuits or, more commonly, DCTL. There are several advantages and some disadvantages of DCTL, and we consider these after discussing how this type of configuration works.

DCTL Inverters

The figure below shows three DCTL inverters in cascade. In this circuit the collector resistors R₁, R₂, and R₃ serve as constant current sources. They supply current to their respective transistors' collectors, when they are on or to the base of the next transistor when they are off.

When the input voltage v_in to the base of Q₁ is near ground—that is at V_CE(SAT) of the previous stage on transistor—voltage v_C1 tends to approach the supply voltage V_CC. Current is supplied to the base of Q₂ through R₁, and this turns Q₂ on. The clamping action of the base-emitter diode of Q₂ holds v_C1 at the value determined by V_BE2. Since Q₂ is on, v_C2 is now determined by the V_CE(SAT) of Q₂. If Q₂ has a sufficiently low saturation drop, then v_C2 will not be positive enough to turn Q₃ on. The reverse situation holds true when a sufficiently positive voltage, v_in, turns Q₁ on. In this case v_C1 will maintain Q₂ off, which in turn will turn Q₃ on. From this brief description several significant points are apparent. A low V_CE(SAT) is a desirable feature of transistors used for DCTL. If the V_CE(SAT) is high, then there is always the possibility that the next stage transistor may be erroneously turned on. Furthermore, in order to assure that all the fan-out transistors are held off, the V_CE(SAT) must be smaller than the smallest V_BE(ON) of the succeeding transistors. It is readily seen that the supply voltage can be relatively small because the output voltage swing varies between the V_CE(SAT) of the on transistor and the V_BE(ON) of the following stage transistors.

DCTL Series Gating

The figure below shows three transistors connected in series to form a NAND gate for positive input signals A, B, and C. If any of the three transistors is off, the output voltage at D will be the supply voltage (V_CC) in the unloaded condition. Under loaded conditions, the voltage at D will depend on the resistor R_L and the V_BE(ON) of the next stage transistor. When all three transistors are on, the potential at D will be closer to ground than in the previous case and will be the sum of the V_CE(SAT) of Q₁, Q₂, and Q₃ in series. Consequently, the principal disadvantage of this configuration is the necessity to insure that the next stage transistor will be off when all three transistors are on. The sum of the three V_CE(SAT) in series must be less than V_BE(ON) of the next stage transistor. One means of accomplishing this is to supply more base drive to Q₁, Q₂, and Q₃, thereby drawing them further into saturation and lowering the saturation resistance

What Is Diode-Transistor Logic?

(Diode-Transistor Logic) A type of digital circuit design that followed resistor-transistor logic (RTL) and was superseded by transistor-transistor logic (TTL). DTL used resistors at the inputs, diodes for logic gates and bipolar transistors for amplification. In subsequent TTL, the diodes were replaced with transistors. See RTL and TTL

Integrated Injection Logic Operation

Integrated Injection Logic Operation is explained as follows. To understand the working of a typical I²L gate, consider , which consists of five transistors, connected as shown. It can be seen that the base current I_B1 of T₁ is derived from +V_CC through the input terminal B. The base-bias current I_B3 of transistor T₃ and the collector current I_C1 of T₁ are obtained from the collector current of transistor T₂ whose injector (emitter) also is connected to +V_CC.